1. Technical Field
The present invention relates to semiconductor devices and methods for manufacturing the same.
2. Related Art
Ferroelectric memory devices (FeRAM) are nonvolatile memory devices capable of low voltage and high-speed operation, and their memory cells can be each formed from one transistor and one capacitor (1T/1C). Accordingly, ferroelectric memory devices can achieve integration at the same level of that of DRAM, and are therefore expected as large-capacity nonvolatile memories.
As such ferroelectric memory devices, primarily, the stacked type is known. The stacked type includes a switching transistor provided below an interlayer dielectric film and a ferroelectric capacitor provided on the interlayer dielectric film, which are connected with each other through a plug conductive layer provided in a contact hole (through hole) formed in the interlayer dielectric film. Also, the ferroelectric capacitor has a structure in which a first electrode, a ferroelectric film and a second electrode are laminated. An upper interlayer dielectric film is formed in a manner to cover the ferroelectric capacitor, and the second electrode of the ferroelectric capacitor is connected to a wiring provided on the upper interlayer dielectric film through a plug conductive layer in a contact hole, like the lower interlayer dielectric film. A ferroelectric capacitor having the structure described above is described, for example, in Japanese Laid-open Patent Application JP-A-7-99290.
In the capacitor having the stacked structure described above, the crystal orientation of each of the layers is influenced by the crystal orientation of their lower layers, and therefore the control of crystal orientation of each of the layers serving as a base layer is very important. In particular, as the ferroelectric capacitor is formed on and extends across the plug conductive layer and the interlayer dielectric film, their top surfaces need to be sufficiently planarized. However, as the material for the plug conductive layer, tungsten (W) is generally used, and it is difficult to form the plug conductive layer with a sufficiently flat surface, as tungsten has relatively large crystal grains, and its surface would likely generate unevenness such as seams and roughness. When their surface is planarized by polishing, the surface of the plug conductive layer would be excessively polished, and recesses (concave sections) would be generated in the surface.
To address such a problem, a conductive body may be placed between the plug conductive layer and the interlayer dielectric film, as described in the aforementioned document. However, in the aforementioned document, a conductive body placed between the top surface of the plug conductive layer and the top surface of the interlayer dielectric layer is functioned as an oxygen barrier film or a hydrogen barrier film, but is not used for the purpose of planarization.
Also, the aforementioned document does not provide a solution to the problem in the planarization caused by the aforementioned recesses. As a countermeasure, it is possible to use a method in which the top surface of the interlayer dielectric layer and recesses on the top surface of the plug conductive layers are filled with a conductive body. However, the recesses are byproducts that are generated at the time of polishing, and therefore their depths are not uniform. Therefore, if the surface is planarized by polishing after the recesses have been filled with the conductive body, portions of the conductive body at shallow recesses may be removed, and the uneven surface of the tungsten plug may be partially exposed.
It is difficult to sufficiently planarize the tungsten surface as described above; and if a ferroelectric capacitor is formed on the uneven tungsten surface where unevenness such as seams and roughness remain, the ferroelectric capacitor would have portions whose crystal orientation is deviated, and therefore its ferroelectric property would be deteriorated. Furthermore, when a plug conductive layer that connects to a wiring section is formed on the ferroelectric capacitor, defective filling of the plug conductive layer may occur due to the aforementioned unevenness of the tungsten surface. When such defective filling occurs, weak points are formed at the interface between the ferroelectric capacitor and the plug conductive layer, and hydrogen gas that is used when forming the plug conductive layer on the ferroelectric capacitor would likely pass through the weak points and penetrate into the ferroelectric capacitor, which would deteriorate the ferroelectric capacitor.